Jun 232009
Let us consider the case of spreading factor 256.
Remember that each slot has 2560 chips.
2560/256 = 10 symbol can be sent in each slot.
For uplink case, remember that DPDCH and DPCCH are code multiplexed. Here 1 symbol is divided into I and Q component. Thus, 1 symbol can convey 1 bit for uplink case (with QPSK).
Thus, uplink DPDCH has 10 bit data in a slot with 256 SF.
For downlink case, DPDCH and DPCCH are time multiplexed.
Thus, 1 symbol can still convey 2 bits.
Thus, downlink has 20 bit data in a slot with 256 SF. However, remember that some of bits are allocated to DPCCH control information.

