Let us consider the case of spreading factor 256.
Remember that each slot has 2560 chips.
2560/256 = 10 symbol can be sent in each slot.
For uplink case, remember that DPDCH and DPCCH are code multiplexed. Here 1 symbol is divided into I and Q component. Thus, 1 symbol can convey 1 bit for uplink case (with [...]
The uplink frame should start 1024 chips after the reception of the first part of the downlink frame.
Uplink:
uplink transmission is continuos and changes in bit rate can be achieved by modifying the spreading factor of the code sequence being used.
Downlink:
Spreading factor is chosen to support the highest bit rate of TFCS.
The variable bit rate is implemented with discontinuous transmission (DTX), swithcing off the transmission during the DPDCH fields in certain time slots.
First, DPCCH and DPDCH are time-multiplexed in the downlink direction.
Note that if code multiplexing was used, each DPCH (DPCCH and DPDCH) requires two channelization codes, and is less efficient.
Second, the control channel must always be present because of the power control mechanism. But, what if there is no user data?
This will result in a pulsed [...]
User data is carried on one or more DPDCHs.
However, there is a single DPCCH with a fixed spreading factor 256.
The below depicts channelization and scrambling for multiple uplink DPDCHs.
The below shows the transmission with multiple downlink DPDCHs
Note that DPCCH contains TFCI (transport format combination indicator).
This means that TFCI will apply to all DPDCHs at the [...]
The combination of different frequency, code and time specify a set of physical channels.
Two main categories: (1) dedicated and (2) control
1. Dedicated physical channels
a. DPDCH (Dedicated Physical Data Channel):
carries DCH transport channel.
As with DCH, this exists both in the uplink and downlink.
closed loop power control (1500 Hz/sec)
b. DPCCH (Dedicated Physical Control Channel):
relates to DPDCH and [...]
